// Copyright (C) 1953-2022 NUDT
// Verilog module name - grandmaster_node_process
// Version: V4.1.0.20221208
// Created:
//         by - fenglin
////////////////////////////////////////////////////////////////////////////
// Description:
//         
///////////////////////////////////////////////////////////////////////////

`timescale 1ns/1ps

module grandmaster_node_process
#(
parameter local_module_id = 12'd0,
parameter clk_period = {8'd8,41'h0}//8ns
)
(
    i_clk  ,
    i_rst_n,
    
    i_sync_step_mode   ,
    
    iv_req_sequence    ,
	
	iv_sync_clk        ,
	iv_local_count     ,
	
	i_gm_role            ,
	iv_sync_period       ,
	iv_hcp_mid           ,
  
	ov_data              ,
	o_data_wr            ,

    o_sync_generate_pulse    
);

// I/O
// clk & rst
input                   i_clk;
input                   i_rst_n; 
// pkt input
input                   i_sync_step_mode   ;

input     [15:0]        iv_req_sequence    ;

input	  [79:0]        iv_sync_clk        ;
input	  [39:0]        iv_local_count     ;
input                   i_gm_role;
input     [3:0]         iv_sync_period  ;

input     [11:0]        iv_hcp_mid     ;
// pkt output to NMA
output    [8:0]	        ov_data        ;
output   	            o_data_wr      ;

output                  o_sync_generate_pulse;

wire      [39:0]        wv_local_count_tx_sge2ope     ;	                						          
wire	                w_sync_generate_pulse_spt2sge ;
wire                    w_first_byte_valid_sge2ope    ;

wire      [8:0]         wv_data_sge2ope;           
wire                    w_data_wr_sge2ope;
wire      [3:0]         wv_ptp_message_type_sge2ope;          
sync_period_timing  
#(
.clk_period(clk_period)
)  
sync_period_timing_inst
(
        .i_clk                 (i_clk   ),
        .i_rst_n               (i_rst_n ),
							  
        .i_gm_role	           (i_gm_role	   ),
        .iv_sync_period        (iv_sync_period),		
							 
        .o_sync_generate_pulse (w_sync_generate_pulse_spt2sge)
);

sync_generate 
#(
.local_module_id(local_module_id)
)
sync_generate_inst
(
    .i_clk                  (i_clk   ),
    .i_rst_n                (i_rst_n ),
    
    .i_sync_step_mode       (i_sync_step_mode),
    
    .iv_req_sequence        (iv_req_sequence ),
 
	.iv_sync_clk            (iv_sync_clk   ),
	.iv_local_count         (iv_local_count),
	 
	.i_sync_generate_pulse  (w_sync_generate_pulse_spt2sge),
	.iv_hcp_mid             (iv_hcp_mid                   ),
 
	.ov_data                (wv_data_sge2ope           ),
	.o_data_wr              (w_data_wr_sge2ope         ),
    .ov_ptp_message_type    (wv_ptp_message_type_sge2ope ),
	.ov_local_count_tx      (wv_local_count_tx_sge2ope ),
    .o_first_byte_valid     (w_first_byte_valid_sge2ope),
    .o_sync_generate_pulse  (o_sync_generate_pulse)    
);

opensync_protocol_encapsulate 
#(
.osm_id(8'd0),
.local_module_id(local_module_id)
)
opensync_protocol_encapsulate_gnp
(
        .i_clk              (i_clk            ),
        .i_rst_n            (i_rst_n          ),

        .iv_hcp_mid         (iv_hcp_mid             ),
        .iv_opensync_dst_module_id(12'h700),//组播的moduleid.
        
        .iv_data            (wv_data_sge2ope       ),
        .i_data_wr          (w_data_wr_sge2ope     ),
		//.iv_osm_id          (8'b0        ),
		.iv_eth_type        (16'h88f7                    ),
		.iv_ptp_messagetype (wv_ptp_message_type_sge2ope ),
        .iv_local_count_rx  (wv_local_count_tx_sge2ope ),
        .i_diagest_wr       (w_first_byte_valid_sge2ope),
        
        .ov_data            (ov_data    ),
        .o_data_wr          (o_data_wr  )
);                
endmodule